Method for mounting a semiconductor chip on a substrate, and semiconductor device adapted for mounting on a substrate

ABSTRACT

A method for manufacturing a semiconductor device includes the steps of providing a semiconductor chip having a pad-mounting surface with bonding pads, attaching a printed circuit sheet to the pad-mounting surface, forming conductive bonding wires that respectively interconnect the bonding pads and conductive traces on the printed circuit sheet, forming a photoresist layer on the printed surface and the pad-mounting surface, forming access holes in the photoresist layer to expose portions of the conductive traces that are respectively offset from the bonding pads, and forming a plurality of conductive bodies in the access holes such that each of the conductive bodies is electrically connected to a respective one of the bonding pads.

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application is related to a co-pending U.S. patent application Ser. No. 09/688,855 filed by the applicant on Oct. 16, 2000, the entire disclosure of which is incorporated herein by reference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the invention

[0003] This invention relates to a method for mounting a semiconductor chip on a substrate and to a semiconductor device that is adapted for mounting on a substrate.

[0004] 2. Description of the Related Art

[0005] With the rapid advancement in semiconductor fabrication technology, the bonding pads on the surface of a semiconductor chip are getting smaller in size, and the distances between adjacent bonding pads are getting shorter. These can create difficulty when connecting the semiconductor chip to an external circuit, and can affect adversely the production yield.

[0006] In co-pending U.S. patent application Ser. No. 09/688,855, the applicant disclosed a method for mounting a semiconductor chip on a substrate to prepare a semiconductor device. The substrate has a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method involves the steps of forming a photoresist layer on the pad-mounting surface with a plurality of contact receiving cavities, each of which is registered with and exposes a portion of one of the bonding pads on the pad-mounting surface, and forming a plurality of conductive bodies, each of which is electrically connected to one of the bonding pads, and each of which has an anchor portion filling one of the contact receiving cavities and connected to the respective bonding pad, an extension portion extending from the anchor portion and formed on the surface of the photoresist layer, and a contact portion protruding from one end of the extension portion and formed on the surface of the photoresist layer opposite to the anchor portion. The contact portion is disposed at the position corresponding to a respective one of the solder points on the chip-mounting region of the substrate.

SUMMARY OF THE INVENTION

[0007] The main object of the present invention is to provide a method of the type similar to that disclosed in the aforesaid co-pending U.S. patent application Ser. No. 09/688,855, for mounting a semiconductor chip on a substrate so as to overcome the aforesaid drawback.

[0008] Another object of the present invention is to provide a semiconductor device of the type similar to that disclosed in the aforesaid co-pending U.S. patent application Ser. No. 09/688,855 that is capable of overcoming the aforesaid drawback.

[0009] According to one aspect of the present invention, there is provided a method for mounting a semiconductor chip on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method comprises the steps of: attaching a printed circuit sheet to the pad-mounting surface, wherein the bonding pads are exposed from the printed circuit sheet, the printed circuit sheet including a non-conductive substrate with a printed surface that is opposite to the pad-mounting surface and that is printed with a plurality of conductive traces which are to be respectively and electrically connected with the bonding pads and which are respectively spaced apart from the bonding pads in lateral directions along the printed surface; forming a plurality of conductive bonding wires that respectively interconnect the bonding pads and the conductive traces; forming a photoresist layer on the printed surface and the pad-mounting surface such that the bonding pads and the bonding wires are embedded in the photoresist layer; forming access holes in the photoresist layer, each of which is registered with and exposes at least a portion of a respective one of the conductive traces; and forming a plurality of conductive bodies in the access holes, wherein each of the conductive bodies is electrically connected to a respective one of the bonding pads

[0010] According to another aspect of the present invention, a semiconductor device is adapted for mounting on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor device comprises: a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads which are disposed on the pad-mounting surface at locations that are offset from locations of corresponding ones of the solder points on the chip-mounting region; a printed circuit sheet attached to the pad-mounting surface and including a non-conductive substrate with a printed surface that is opposite to the pad-mounting surface and that is printed with a plurality of conductive traces which are respectively spaced apart from the bonding pads in lateral directions along the printed surface; a plurality of conductive bonding wires that respectively interconnect the bonding pads and the conductive traces; a photoresist layer overlaid on the printed surface and the pad-mounting surface such that the bonding pads and the bonding wires are embedded in the photoresist layer, and formed with a plurality of access holes, each of which is registered with and exposes at least a portion of a respective one of the conductive traces; and a plurality of conductive bodies respectively disposed in the access holes, and connected electrically and respectively to the bonding pads.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In drawings which illustrate an embodiment of the invention,

[0012]FIG. 1 is a fragmentary perspective view to illustrate a semiconductor chip connected to a printed circuit sheet via conductive bonding wires according to the method of this invention;

[0013]FIG. 2 is a cross-sectional view of an assembly of the printed circuit sheet, the bonding wire, and the semiconductor chip of FIG. 1;

[0014]FIG. 3 illustrates a photoresist layer and a mask used in a photolithography process for the assembly of FIG. 2 according to the method of this invention;

[0015]FIG. 4 illustrates an access hole formed in the photoresist layer of FIG. 3 and a conductive body formed in the access hole according to the method of this invention;

[0016]FIG. 5 illustrates an assembly of the photoresist layer, the conductive body, the printed circuit sheet, the bonding wire, and the semiconductor chip of FIG. 4; and

[0017]FIGS. 6 and 7 illustrate different configurations of assemblies of the photoresist layer, the conductive bodies, the printed circuit sheet, the bonding wires, and the semiconductor chip that are modified from FIG. 5 according to different layouts of the bonding pads.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0018]FIG. 5 illustrates a semiconductor chip 1 to be mounted on a substrate 9 according to the method of this invention. The substrate 9 has a chip-mounting region provided with a plurality of solder points 90. The semiconductor chip 1 has a pad-mounting surface 10 provided with a plurality of bonding pads 11 (see FIG. 1) , which are to be connected to corresponding ones of the solder points 90 and which are disposed on the pad-mounting surface 10 at locations that are offset from locations of the corresponding ones of the solder points 90 on the chip-mounting region of the substrate 9. The bonding pads 11 are aligned along a center line of the pad-mounting surface 10.

[0019] FIGS. 1 to 5 illustrate consecutive steps for processing the semiconductor chip 1 to form a semiconductor device that is to be mounted on the substrate 9 according to the method of this invention.

[0020] In FIGS. 1 and 2, a printed circuit sheet 2 is attached to the pad-mounting surface 10 such that a portion of the pad-mounting surface 10 with the bonding pads 11 is exposed from the printed circuit sheet 2. The printed circuit sheet 2 includes a non-conductive substrate 21 with a printed surface 20 that is opposite to the pad-mounting surface 10 and that is printed with a plurality of spaced apart conductive traces 21 which are to be respectively and electrically connected to the bonding pads 11 and which are respectively spaced apart from the bonding pads 11 in lateral directions along the printed surface 20.

[0021] A plurality of conductive bonding wires 22 are formed via known wire bonding techniques to respectively interconnect the bonding pads 11 and the conductive traces 21.

[0022] In FIG. 3, a light-curable layer, such as a photoresist layer 3 is formed on the printed surface 20 and the pad-mounting surface 10 such that the bonding pads 11 and the bonding wires 22 are embedded in the photoresist layer 3. A mask 4 is superimposed on the photoresist layer 3, and the photoresist layer 3 is exposed at positions that are offset from contact portions 211 of the conductive traces 21. The exposed portion of the photoresist layer 3 hardens, and forms an insulative isolating layer that covers the printed surface 20 and the pad-mounting surface 10.

[0023] In FIG. 4, a plurality of access holes 30 (only one is shown) are formed in the photoresist layer 3 by removing the unexposed portion of the photoresist layer 3 from the isolating layer via solvent washing. Each of the access holes 30 exposes the contact portion 211 of a respective one of the conductive traces 21. Preferably, the contact portion 211 of each of the conductive traces 21 is registered with a respective one of the solder points 90 of the substrate 9 (see FIG. 5).

[0024] A plurality of conductive bodies 5 are respectively formed in the access holes 30 (only one is shown in FIG. 5). Each of the conductive bodies 5 is electrically connected to a respective one of the bonding pads 11, and protrudes from a respective one of the access holes 30 so as to permit electrical connection with the corresponding solder point 90 of the substrate 9 (see FIG. 5).

[0025]FIGS. 6 and 7 illustrate different configurations of assemblies of the photoresist layer 3, the conductive bodies 5, the printed circuit sheet 2, the bonding wires 22, and the semiconductor chip 1 that are modified from FIG. 5 according to different layouts of the bonding pads 11. In FIG. 6, the bonding pads 11 are formed on a peripheral portion of the pad-mounting surface 10 of the semiconductor chip 1. In FIG. 7, the bonding pads 11 are formed into two parallel rows along a center portion of the pad-mounting surface 10 of the semiconductor chip 1.

[0026] With the printed circuit sheet 2, the bonding wires, and the conductive bodies 5, the electrical connection between the semiconductor chip 1 and the substrate 9 can be easily and flexibly achieved.

[0027] With the invention thus explained, it is apparent that various modifications and variations can be made without departing from the spirit of the present invention. It is therefore intended that the invention be limited only as recited in the appended claims. 

I claim:
 1. A method for mounting a semiconductor chip on a substrate, the substrate having a chip-mounting region provided with a plurality of solder points, the semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region, said method comprising the steps of: attaching a printed circuit sheet to the pad-mounting surface, wherein the bonding pads are exposed from the printed circuit sheet, the printed circuit sheet including a non-conductive substrate with a printed surface that is opposite to the pad-mounting surface and that is printed with a plurality of conductive traces which are to be respectively and electrically connected to the bonding pads and which are respectively spaced apart from the bonding pads in lateral directions along the printed surface; forming a plurality of conductive bonding wires that respectively interconnect the bonding pads and the conductive traces; forming a photoresist layer on the printed surface and the pad-mounting surface such that the bonding pads and the bonding wires are embedded in the photoresist layer; forming access holes in the photoresist layer, each of which is registered with and exposes at least a portion of a respective one of the conductive traces; and forming a plurality of conductive bodies in the access holes, wherein each of the conductive bodies is electrically connected to a respective one of the bonding pads.
 2. The method of claim 1, wherein each of the access holes is formed in the photoresist layer at a location corresponding to a respective one of the solder points on the chip-mounting region of the substrate.
 3. A semiconductor device adapted for mounting on a substrate, the substrate having a chip-mounting region provided with a plurality of solder points, said semiconductor device comprising: a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads which are disposed on said pad-mounting surface at locations that are offset from locations of corresponding ones of the solder points on the chip-mounting region; a printed circuit sheet attached to said pad-mounting surface and including a non-conductive substrate with a printed surface that is opposite to said pad-mounting surface and that is printed with a plurality of conductive traces which are respectively spaced apart from said bonding pads in lateral directions along said printed surface; a plurality of conductive bonding wires that respectively interconnect said bonding pads and said conductive traces; a photoresist layer overlaid on said printed surface and said pad-mounting surface such that said bonding pads and said bonding wires are embedded in said photoresist layer, and formed with a plurality of access holes, each of which is registered with and exposes at least a portion of a respective one of said conductive traces; and a plurality of conductive bodies respectively disposed in said access holes, and connected electrically and respectively to said bonding pads.
 4. The semiconductor device of claim 3, wherein each of said access holes is formed in said photoresist layer at a location corresponding to a respective one of the solder points on the chip-mounting region of the substrate. 